Erinevus lehekülje "Software Synthesis and Verification" redaktsioonide vahel
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| 77. rida: | 77. rida: | ||
** [http://link.springer.com/article/10.1023%2FA%3A1008764923992 Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394] | ** [http://link.springer.com/article/10.1023%2FA%3A1008764923992 Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394] | ||
** Reference solution: [[Media:FASDS.pdf|Chapter 12, page 172]] | ** Reference solution: [[Media:FASDS.pdf|Chapter 12, page 172]] | ||
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| + | * Lab 12: | ||
| + | ** [http://web.iitd.ac.in/~sumeet/slide3.pdf LTL] | ||
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Redaktsioon: 18. aprill 2019, kell 06:59
Course code: ITI8531
Link: http://courses.cs.ttu.ee/pages/ITI0130
Lecturer: prof. Jüri Vain
Contact: juri.vain ätt ttu.ee, ICT-418
Lab assistant:
Evelin Halling
Contact: evelin.halling ätt ttu.ee,
Previous courses: 2014
Time and place
Lectures: Tuesdays 12:00, ICT-A1
Labs: Thursdays 10:00, ICT-A1 - Evelin Halling
Lecture plan
- Lecture 1: Introduction
- Lecture 2: Modelling state transition systems
- Lecture 3: Temporal logic CTL*
- Lecture 4: CTL model checking
- Lecture 5: Timed automata and TCTL model checking
- Practicing for Test 1: Model checking Exercises: (05.03.2019)
- Test 1: Model checking (12.03.2019)
- Lecture 6: Program specifications (19.03.2019)
- Lecture 7: Proving partial correctness of programs (19.03.2019)
- Lecture 8: Proof techniques (1): derived rules, backwards proof, annotations (26.03.2019)
- Lecture 9: Proving total correctness of while-programs (26.03.2019)
- Lecture 10: Verifying nondeterministic and parallel programs (02.04.2019)
- Practicing for Test 2: Deductive verification of non-deterministic and parallel programs (04.04.2019 at lab time)
- Genzen 1st order calculus: Genzen 1st order sequent calculus (proof rules)
- Test 2: Deductive verification of sequential, non-deterministic and parallel programs (09.04.2019,at 12.00)
- Lecture 11: Program synthesis I (16.04.2019)
- Lecture 12: Program synthesis II (23.04.2019)
- Lecture 13: Program synthesis III (30.04.2019)
- Lecture 14: Program synthesis IV (7.05.2019)
- Lecture 15: Program synthesis (recap) and practicing for test (14.05.2019)
- Test 3: Program synthesis (16.05.2017)
Labs
- Lab 1: Introduction to modelling in UPPAAL
- Slides: UPPAAL introduction
- Model: Light Controller Model
- Query: Light Controller Query
- For More reading, refer below links:
- Lab 2: Validation (simulation) and verification (automatic model-checking) in UPPAAL
- Slides: Model Checking introduction
- Model: ATM System Model
- Query: ATM System Query
- Lab 3: Understanding of Clocks and State Space Explosion in UPPAAL
- Slides: Uppaal Modelling Language
- Model: JobShop Model with three possible scenarios
- Query: JobShop Query
- Lab 4: Assignment I: Reader-Writer (unreliable) communication protocol
- Slides: Example and explanation
- Lab 5: Assignment II: Leader election protocol
- Lab 12:
Exercises
- Exercises 1: Model checking (explicit and symbolic state)
- Exercises 2: Partial correctness of WHILE-programs
- Partial correctness of non-deterministic and parallel programs
- Exercises 3.1: Partial correctness of non-deterministic and parallel programs
- Exercises 3.2: Partial correctness of non-deterministic and parallel programs
- Exercises 3.3: Parallel programs with message passing
Resources
- Formal Methods Europe
- Genzen's proof system for 1st order logic:
- HL proof rules for sequential and parallel programs:
- Some guidlines how to find invariants
- Mike Gordon's lecture notes on Hoare logic [1]