Erinevus lehekülje "Software Synthesis and Verification" redaktsioonide vahel

Allikas: Kursused
Mine navigeerimisribale Mine otsikasti
42. rida: 42. rida:
 
** [[Media:ITI8531_Genzen_1st_order_calculus.pdf|Genzen 1st order calculus]]: Genzen 1st order sequent calculus (proof rules)
 
** [[Media:ITI8531_Genzen_1st_order_calculus.pdf|Genzen 1st order calculus]]: Genzen 1st order sequent calculus (proof rules)
 
* Test 2: Deductive verification of sequential, non-deterministic and parallel programs ('''09.04.2019,at 12.00''')
 
* Test 2: Deductive verification of sequential, non-deterministic and parallel programs ('''09.04.2019,at 12.00''')
* [[Media:Software Synthesis - Overview of Temporal Synthesis - Lecture 11.pdf|Lecture 11]]: Program synthesis I (16.04.2019)
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* [[Media:Software Synthesis - Overview of Temporal Synthesis - Lecture 11.pdf|Lecture 11]]: Software synthesis I (16.04.2019)
* [[Media:Software Synthesis - Introduction to Acacia - Lecture 12.pdf|Lecture 12]]: Program synthesis II (23.04.2019)
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* [[Media:Software Synthesis - Introduction to Acacia - Lecture 12.pdf|Lecture 12]]: Software synthesis II (23.04.2019)
* [[Media:ITI8531_synthesis2_2017.pdf|Lecture 13]]: Program synthesis III (30.04.2019)
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* [[Media:ITI8531_synthesis2_2017.pdf|Lecture 13]]: Software synthesis III (30.04.2019)
* [[Media:ITI8531_synthesis2_2017.pdf|Lecture 14]]: Program synthesis IV (7.05.2019)
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* [[Media:ITI8531_synthesis2_2017.pdf|Lecture 14]]: Software synthesis IV (7.05.2019)
* [[Media:ITI8531_synthesis2_2017.pdf|Lecture 15]]: Program synthesis (recap)  and practicing for test  (14.05.2019)
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* [[Media:ITI8531_synthesis2_2017.pdf|Lecture 15]]: Software synthesis (recap)  and practicing for test  (14.05.2019)
* Test 3: Program synthesis ('''16.05.2017''')
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* Test 3: Software synthesis ('''16.05.2019''')
  
 
==Labs==
 
==Labs==

Redaktsioon: 23. aprill 2019, kell 13:25

Course code: ITI8531
Link: http://courses.cs.ttu.ee/pages/ITI0130

Lecturer: prof. Jüri Vain
Contact: juri.vain ätt ttu.ee, ICT-418

Lab assistant: Evelin Halling
Contact: evelin.halling ätt ttu.ee,


Previous courses: 2014


Time and place

Lectures: Tuesdays 12:00, ICT-A1
Labs: Thursdays 10:00, ICT-A1 - Evelin Halling

Lecture plan

  • Lecture 1: Introduction
  • Lecture 2: Modelling state transition systems
  • Lecture 3: Temporal logic CTL*
  • Lecture 4: CTL model checking
  • Lecture 5: Timed automata and TCTL model checking
  • Practicing for Test 1: Model checking Exercises: (05.03.2019)
  • Test 1: Model checking (12.03.2019)
  • Lecture 6: Program specifications (19.03.2019)
  • Lecture 7: Proving partial correctness of programs (19.03.2019)
  • Lecture 8: Proof techniques (1): derived rules, backwards proof, annotations (26.03.2019)
  • Lecture 9: Proving total correctness of while-programs (26.03.2019)
  • Lecture 10: Verifying nondeterministic and parallel programs (02.04.2019)
  • Practicing for Test 2: Deductive verification of non-deterministic and parallel programs (04.04.2019 at lab time)
  • Test 2: Deductive verification of sequential, non-deterministic and parallel programs (09.04.2019,at 12.00)
  • Lecture 11: Software synthesis I (16.04.2019)
  • Lecture 12: Software synthesis II (23.04.2019)
  • Lecture 13: Software synthesis III (30.04.2019)
  • Lecture 14: Software synthesis IV (7.05.2019)
  • Lecture 15: Software synthesis (recap) and practicing for test (14.05.2019)
  • Test 3: Software synthesis (16.05.2019)

Labs


Exercises

  • Exercises 1: Model checking (explicit and symbolic state)
  • Exercises 2: Partial correctness of WHILE-programs
  • Partial correctness of non-deterministic and parallel programs
    • Exercises 3.1: Partial correctness of non-deterministic and parallel programs
    • Exercises 3.2: Partial correctness of non-deterministic and parallel programs
    • Exercises 3.3: Parallel programs with message passing

Resources