Software Synthesis and Verification

Course code: ITI0130, ITI8530
Link: http://courses.cs.ttu.ee/pages/ITI0130

Lecturer: prof. Jüri Vain
Contact: juri.vain ätt ttu.ee, ICT-418

Previous courses: 2014

Time and place

Lectures: Wednesdays 14:00, ICT-A1
Labs: Wednesdays 16:00, ICT-401 - Evelin Halling (evelin.halling ätt ttu.ee)

News 2015

• Written exam I: at 14.00 on May 27, Room ICT-411
• Written exam II: at 14.00 on June 3, Room ICT-411

Lecture plan

• Lecture 1: Introduction to formal methods
• Lecture 2: Modelling state transition systems
• Lecture 3: Temporal logic CTL*
• Lecture 4: CTL model checking
• Lecture 5: Timed automata and TCTL model checking
• Test 1: Model checking
• Lecture 7: Program specifications
• Lecture 8: Proving partial correctness of programs
• Lecture 9.1: Proof techniques (1): derived rules, backwards proof, annotations
• Lecture 9.2: Proof techniques (2): Array- and FOR-rule
• Lecture 10: Proving total correctness of while-programs
• Test 2: Deductive verification of sequential programs
• Lecture 11: Non-deterministic programs
• Lecture 12: Parallel programs with shared variables
• Lecture 13: Parallel programs with message passing
• Test 3: Deductive verification of non-deterministic and parallel programs

Labs

• Lab 1: Introduction to modelling in UPPAAL
  • UPPAAL website
  • Small tutorial on UPPAAL
  • Tutorial on UPPAAL
  • Slides: UPPAAL introduction
  • Model: Lamp example
  • Query: Lamp example
• Lab 2: Introduction to modelling in UPPAAL
  • Slides: Example and explanation
  • Model: Coffee machine
  • Query: Coffee machine
• Lab 3: Reader-Writer (unreliable) communication protocol
  • Slides: Example and explanation
• Lab 4: Leader election protocol
  • Slides: Explanation
  • The Leader Election Protocol (IEEE 1394)
  • Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394
• Lab 5: Design-by-Contract
  • Contracts for Java (Cofoja)
  • Cofoja wiki page
  • Installation instructions
  • Sample code

• Lab 6: Design-by-Contract
  • Database

• Lab 7: Design-by-Contract
  • Secure Database

• Lab 8: Design-by-Contract
  • Cofoja Assignment
    • Instructions

• Lab 9: Key Tool
  • Installation

• Lab 10: Key Tool
  • Key Examples

• Lab 11: Key Tool
  • JML
  • SumAndMax Example

Exercises

• Exercises 1: Model checking (explicit and symbolic state)
• Exercises 2: Partial correctness of WHILE-programs
  • Example 1: Partial correctness of WHILE-loop
  • Example 2: Partial correctness of FOR-loop
• Exercises 3: Partial correctness of non-deterministic and parallel programs

Resources

• Formal Methods Europe
• Genzen's proof system for 1st order logic:
• HL proof rules for sequential and parallel programs:
• Some guidlines how to find invariants