Erinevus lehekülje "Software Synthesis and Verification" redaktsioonide vahel

Allikas: Kursused
Mine navigeerimisribale Mine otsikasti
38. rida: 38. rida:
  
 
==Labs==
 
==Labs==
* Lab 1: Introduction to modelling in UPPAAL  
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* Lab 1 -2: Introduction to modelling in UPPAAL  
 
** [http://www.uppaal.org/ UPPAAL website]
 
** [http://www.uppaal.org/ UPPAAL website]
 
** [http://www.it.uu.se/research/group/darts/uppaal/small_tutorial.pdf Small tutorial on UPPAAL]
 
** [http://www.it.uu.se/research/group/darts/uppaal/small_tutorial.pdf Small tutorial on UPPAAL]
45. rida: 45. rida:
 
** Model: [[Media:ITI0130_Light.xml|Lamp example]]
 
** Model: [[Media:ITI0130_Light.xml|Lamp example]]
 
** Query: [[Media:ITI0130_Light.q|Lamp example]]
 
** Query: [[Media:ITI0130_Light.q|Lamp example]]
* Lab 2: Introduction to modelling in UPPAAL
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* Lab 3: Introduction to modelling in UPPAAL
 
** Assignment: Coffee Machine
 
** Assignment: Coffee Machine
 
** Slides: [[Media:ITI0130_Lab1_Coffee_machine_2015.pdf|Example and explanation]]
 
** Slides: [[Media:ITI0130_Lab1_Coffee_machine_2015.pdf|Example and explanation]]
 
** Model: [[Media:ITI0130_Coffee.xml|Coffee machine]]
 
** Model: [[Media:ITI0130_Coffee.xml|Coffee machine]]
 
** Query: [[Media:ITI0130_Coffee.q|Coffee machine]]
 
** Query: [[Media:ITI0130_Coffee.q|Coffee machine]]
* Lab 3: UPPAAL
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* Lab 4: UPPAAL
 
** Assignment: Reader-Writer (unreliable) communication protocol
 
** Assignment: Reader-Writer (unreliable) communication protocol
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** Slides: [[Media:ITI0130_Lab2_2015.pdf|Example and explanation]]
 
** Slides: [[Media:ITI0130_Lab2_2015.pdf|Example and explanation]]
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* Lab 4: More on UPPAAL
 
** No assignment
 
 
* Lab 5: UPPAAL
 
* Lab 5: UPPAAL
 
** Assignment: Leader election protocol  
 
** Assignment: Leader election protocol  

Redaktsioon: 25. veebruar 2016, kell 07:15

Course code: ITI8531
Link: http://courses.cs.ttu.ee/pages/ITI0130

Lecturer: prof. Jüri Vain
Contact: juri.vain ätt ttu.ee, ICT-418

Previous courses: 2014


Time and place

Lectures: Thursdays 12:00, ICT-A1
Labs: Thursdays 10:00, ICT-405 - Evelin Halling (evelin.halling ätt ttu.ee)

News 2016

  • Written exam I: at 14.00 on May 27, Room ICT-411
  • Written exam II: at 14.00 on June 3, Room ICT-411


Lecture plan

  • Lecture 1: Introduction
  • Lecture 2: Modelling state transition systems
  • Lecture 3: Temporal logic CTL*
  • Lecture 4: CTL model checking
  • Lecture 5: Timed automata and TCTL model checking
  • Test 1: Model checking
  • Lecture 7: Program specifications
  • Lecture 8: Proving partial correctness of programs
  • Lecture 9.1: Proof techniques (1): derived rules, backwards proof, annotations
  • Lecture 9.2: Proof techniques (2): Array- and FOR-rule
  • Lecture 10: Proving total correctness of while-programs
  • Test 2: Deductive verification of sequential programs
  • Lecture 11: Non-deterministic programs
  • Lecture 12: Parallel programs with shared variables
  • Lecture 13: Parallel programs with message passing
  • Test 3: Deductive verification of non-deterministic and parallel programs

Labs


Exercises

  • Exercises 1: Model checking (explicit and symbolic state)
  • Exercises 2: Partial correctness of WHILE-programs
  • Exercises 3: Partial correctness of non-deterministic and parallel programs

Resources